HI5762/6IN【PDF 7/16 页】CONV A/DDUAL 10BIT 60MSPS 44MQFP

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FN4318.3

January 22, 2010

I/Q Channel Crosstalk

I/Q Channel Crosstalk is a measure of the amount of

channel separation or isolation between the two A/D

converter cores contained within the dual converter

package. The measurement consists of stimulating one

channel of the converter with a fullscale input signal and

then measuring the amount that signal is below, in dBc, a

fullscale signal on the opposite channel.

Timing Definitions

Refer to Figure 1 and Figure 2 for these definitions.

Aperture Delay (tAP)

Aperture delay is the time delay between the external

sample command (the falling edge of the clock) and the time

at which the signal is actually sampled. This delay is due to

internal clock path propagation delays.

Aperture Jitter (tAJ)

Aperture jitter is the RMS variation in the aperture delay due

to variation of internal clock path delays.

Data Hold Time (tH)

Data hold time is the time to where the previous data (N - 1)

is no longer valid.

Data Output Delay Time (tOD)

Data output delay time is the time to where the new data (N)

is valid.

Data Latency (tLAT)

After the analog sample is taken, the digital data representing

an analog input sample is output to the digital data bus

following the 6th cycle of the clock after the analog sample is

taken. This is due to the pipeline nature of the converter

where the analog sample has to ripple through the internal

subconverter stages. This delay is specified as the data

latency. After the data latency time, the digital data

representing each succeeding analog sample is output

during the following clock cycle. The digital data lags the

analog input sample by 6 sample clock cycles.

Power-Up Initialization

This time is defined as the maximum number of clock cycles

that are required to initialize the converter at power-up. The

requirement arises from the need to initialize the dynamic

circuits within the converter.

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